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search query: @keyword verifiointi / total: 19

references: 15-19 / 19

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	title	year	author
15.	Product Level Verification and Validation Process for Nokia SDH Equipment	1997	Kaitajärvi, Reima
16.	Methodology of Dynamical Analysis of SDL Programs Using Predicate/Transition Nets	1997	Malmqvist, Markus
17.	Model Checking the Branching Time Temporal Logic CTL	1997	Heljanko, Keijo
18.	VHDL Test Bench Approach to ASIC Design Validation and Verification	1996	Zetterman, Tommi
19.	Kuvauskielen käyttö datasiirto-ohjelmistoissa	1986	Luukkonen, Ari

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