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Author:Jose James, Rony
Title:Effect of temperature on mechanical shock reliability of high density WL-CSP interconnections
Publication type:Master's thesis
Publication year:2006
Pages:v + 78      Language:   eng
Department/School:Sähkö- ja tietoliikennetekniikan osasto
Main subject:Elektroniikan valmistustekniikka   (S-113)
Supervisor:Kivilahti, Jorma
Instructor:Mattila, Toni
OEVS:
Electronic archive copy is available via Aalto Thesis Database.
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Location:P1 Ark S80     | Archive
Keywords:mechanical shock reliability
temperature
lead-free
high density interconnections
Abstract (eng): Portable devices are exposed to different kind of loadings during their daily use.
These devices are mainly stressed by the high temperatures attained during their operation, due to heat dissipation as well as mechanical shock loads caused by dropping.
To make loading condition of the reliability tester to imitate the real life loading conditions more closely, the test system should simultaneously take into account the effect of temperature and mechanical shock loadings.
Therefore objective of this thesis is to study the effect of temperature on the mechanical shock reliability of high-density interconnections typically used in portable devices.

The type of component used in this work is a wafer level-chip scale package.
Lead-free materials, which are typically used in electronics industry, were employed in the production and assembly processes of the component boards.
The component boards were exposed to mechanical shock loads according to the JESD22-B 111 standard drop test.
Drop testing was carried out at room temperature as well as at elevated temperatures (75, 100 and 125°C).
The elevated temperatures were achieved by powering up the daisy-chain structure of the components.
The temperature of the chip was measured using the integrated serpentine aluminium resistors on the silicon chip inside the component package.

Average drops to failure were found to increase with increasing temperature of the device.
Because strain-rate hardening of solder is reduced and solder becomes softer at elevated temperatures, the solder can accommodate stresses more effectively at elevated temperatures.
This causes more drops to failure at elevated temperatures.

Cross-sectional failure analyses revealed that cracks were propagating through bulk solder near the component side intermetallic layers and also through component side intermetallic layers in the samples dropped at elevated temperatures.
For the samples dropped at room temperature cracks propagated only through the component side intermetallic layers.
Cracking in solder bulk takes place by ductile rather than brittle manner (as in the case of intermetallic layers), increasing the energy and time needed for its propagation, this contributes to the increase in drops to failure.
ED:2006-11-27
INSSI record number: 32671
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