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| Author: | Lopez Guadarrama, Ivan |
| Title: | Virtual Platform for the ARM Cortex-M0 Processor |
| Publication type: | Master's thesis |
| Publication year: | 2015 |
| Pages: | vii + 68 Language: eng |
| Department/School: | Perustieteiden korkeakoulu |
| Main subject: | Embedded Systems (SCI3024) |
| Supervisor: | Saikkonen, Heikki ; Bril, Reinder J. |
| Instructor: | Hirvisalo, Vesa ; Nikander, Pekka |
| Electronic version URL: | http://urn.fi/URN:NBN:fi:aalto-201504082206 |
| Location: | P1 Ark Aalto 3104 | Archive |
| Keywords: | ARM Cortex-M0 RTOS open source hardware internet of things voluntary preemption context switch |
| Abstract (eng): | Modern microcontrollers provide a 32 bit core, a rich set of peripherals and on chip memories. However, due to the recent slowing down of the exponential increase in RAM performance, memory has become the main cost factor of low-end MCUs. For enabling the IoT evolution, and until a technological breakthrough improves memory performance, inexpensive sensing and actuation nodes will be heavily memory constrained. Ell-i Open Source Co-operative developed an Open Source Hardware prototype PoE enabled IoT node, which targets to use the smallest ARM Cortex-M0 MCU, with a maximum of 4kB of RAM. Although multiple Open Source Real-Time Operating Systems were available, none of them satisfied the requirements. These included fitting into the memory footprint without minimal configuration, properly handling of the hardware interrupt controller, or adequate alignment with the company's business plan. This work provides a memory constrained scheduler that rivals in performance and memory footprint the evaluated Open Source RTOSs alternatives. Additionally, it provides safety features not present in other systems, while providing the necessary alignment to Ell-i Co-Operative. A comprehensive evaluation of popular RTOSs for the Cortex-M0 architecture is included, as it allows the benchmarking of the developed system. |
| ED: | 2015-04-19 |
INSSI record number: 51051
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