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Author:Ukkonen, Pekka
Title:Design of a delay equalizer for the baseband of an integrated radio receiver
Kantataajuisen viiveenkorjaimen suunnittelu integroituun radiovastaanottimeen
Publication type:Master's thesis
Publication year:2012
Pages:[10] + 49      Language:   eng
Department/School:Mikro- ja nanotekniikan laitos
Main subject:Piiritekniikka   (S-87)
Supervisor:Halonen, Kari
Instructor:Saari, Ville
OEVS:
Electronic archive copy is available via Aalto Thesis Database.
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Location:P1 Ark Aalto  1530   | Archive
Keywords:integrated circuits
delay equalizer
gm-C
all-pass filter
integroidut piirit
viiveenkorjain
kokopäästösuodatin
Abstract (eng): This thesis presents an analogy second-order delay equalizer designed for the baseband of an integrated direct-conversion receiver for synthetic aperture radar.
The primary object of the thesis is to study the reliability and performance of the delay equalizer in this application.
The circuit is fabricated in a 130-nm CMOS technology.

First, the thesis introduces the basic concepts of delay equalization and its theoretical analysis.
Next, the thesis covers the circuit design of the individual circuits of the delay equalizer, which is implemented with the transconductance-capacitance technique.
Discussion on non-idealities and compensation of process variations is given.
Lastly, the simulation and measurement results are presented.

Important requirements for the delay equalizer are accurate delay characteristic and flat magnitude response, which arise from the overall system requirements.
To achieve these goals, the design takes into account two important non-idealities in the circuit, namely output conductance of the transconductors and parasitic capacitances.

As a stand-alone circuit, the delay equalizer shows good performance in simulations.
When connected to a driving buffer stage, however, the flatness of the magnitude response is degraded.
Measurements show a 2.9-dB ripple in the pass band but the delay characteristic is close to desired.
Abstract (fin): Tässä diplomityössä on suunniteltu analoginen toisen asteen viiveenkorjain integroidun synteettisen apertuurin tutkavastaanottimen kantataajuusosaan.
Työn päätavoitteena on tutkia viiveenkorjaimen toteutettavuutta ja suorituskykyä annetussa sovelluskohteessa.
Piiri on valmistettu 130 nm:n CMOS-teknologialla.

Työn alussa esitellään viiveenkorjauksen periaate ja teoreettinen analyysi.
Seuraavaksi käydään läpi transkonduktanssi-kapasitanssi -tekniikalla toteutetun viiveenkorjaimen suunnittelu osa osalta.
Samalla tarkastellaan epäideaalisuuksien ja prosessivariaatioiden vaatimia ratkaisuja.
Lopuksi esitetään simulaatio- ja mittaustulokset.

Viiveenkorjaimen tärkeimmät ominaisuudet ovat tarkka ryhmäkulkuajan muoto ja tasainen amplitudivaste.
Näiden saavuttamiseksi suunnittelussa on 0tettu huomioon piirin kaksi tärkeintä epäideaalisuutta: transkonduktanssien lähtökonduktanssi sekä parasiittiset kapasitanssit.

Yksinään simuloituna viiveenkorjaimen ominaisuudet olivat lähellä toivottuja.
Viiveenkorjainta edeltävän puskuriasteen kytkeminen kuitenkin huononsi amplitudivasteen tasaisuutta.
Mittaukset osoittivat päästökaistan amplitudivasteessa 2.9 dB:n aaltoilun ryhmäkulkuajan ollessa lähellä toivottua.
ED:2012-11-07
INSSI record number: 45398
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